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Memory Systems Research
Department of
Computer Science & Engineering
University of
Washington, FR-35
Seattle, WA
98195
Welcome to the home page for Memory Systems Research at UW CSE.
Description
Our research group is investigating techniques that use the
operating system to improve memory system performance. All of our
work shares the following features:
- We rely on a combination of simple hardware support and
operating system modifications to monitor the dynamic behavior of
applications.
- These monitoring mechanisms incur a small overhead at runtime,
but the information they collect can be used to identify sources of
memory system delays such as cache misses and TLB misses.
- By identifying and resolving these bottlenecks, we not only pay
for the overhead of the monitoring mechanisms, but also
significantly improve overall system performance.
In our most recent project, we built Etch, a tool for measuring
and optimizing the performance of applications running under
Windows on x86 platforms.
For more details on this project, see our paper Instrumentation and Optimization of
Win32/Intel Executables Using Etch, Usenix NT Workshop '97, to
appear.
People
Faculty:
Students:
Papers
Reducing
TLB and Memory Overhead Using Online Superpage Promotion .
Romer, Ohlrich, Karlin, and Bershad. ISCA '95, to appear.
Dynamic
Page Mapping Policies for Cache Conflict Resolution on Standard
Hardware . Romer, Lee, Bershad, and Chen. OSDI , pp.
255-266.
Avoiding
Conflict Misses Dynamically in Large Direct-Mapped Caches .
Bershad, Lee, Romer, and Chen. ASPLOS VI, pp.
158-170.
-
A Comparison of the Memory Performance of the MIPS R3000 and DEC
Alpha 21064. Wong. Ph. D. Quals Project Report, University of
Washington.
- Instruction
Cache Effects of Different Code Reordering Algorithms. Lee. Ph.
D. Quals Project Report, University of Washington.
Ted
Romer (romer@cs.washington.edu)