Recent Publications

Journals

"A New Technique for I_DDQ Testing in Nanometer Technologies", Y. Tsiatouhas, Y. Moissiadis, Th. Haniotakis, D. Nikolos and  A. Arapoyanni, Integration the VLSI Journal, vol.  31, pp. 183-194, 2002. 

          "Analog-to-Digital Interface for Heterodyne Receivers", A. Pnevmatikakis,

           L.Dermentzoglou, A. Arapoyanni, Journal of Circuits, Systems and           Computers, 2002. 

"High performance level restoration circuits", Y. Moisiadis, I. Bouras, A.Arapoyanni, Elsenier Science, Microelectronics Journal, 2002.

 

"Comparative Study of Different Current Mode Sense Amplifiers in Submicron CMOS Technology", A. Chrisanthopoulos, Y. Moissiadis, Y. Tsiatouhas, and  A. Arapoyanni, IEE Proceedings on Circuits, Devices and Systems, vol.  149, no. 3, pp. 154-158, 2002.

 

"A High-Density DRAM Cell with Built-In Gain Stage", G. Kamoulakos, Y. Tsiatouhas, A. Chrisanthopoulos, and  A. Arapoyanni, IEEE Transactions on Electron Devices, vol.  48, no. 6, pp. 1194-1199, 2001.

 

"Device Simulation of an n-DMOS Cell with Trench Isolation", G. Kamoulakos, Th. Haniotakis, Y. Tsiatouhas, J-P. Schoellkopf and A. Arapoyianni, Microelectronics Journal, vol. 32 (1), pp 75-80, 2001.

 

"Management of Charge Pump Circuits", G. Kamoulakos, A. Chrisanthopoulos, Y. Tsiatouhas and A. Arapoyanni, Integration the VLSI Journal, vol. 30 (1), pp. 91-101, Nov. 2000.

Conferences

"Building Blocks for a 100MS/s, 10b, 1.8V CMOS Cascaded Folding & Interpolating A/D Converter", Chr. Kokozidis, St. Bouras, A. Arapoyanni, 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS03), December 2003.

"A Low Power NORA Design Technique Based on Charge Recycling",  Y. Tsiatouhas, K. Limniotis, A. Arapoyanni and Th. Haniotakis,10th IEEE International Conference on Electronics, Circuits and Systems (ICECS03), December 2003.

" A Sense Amplifier Based Circuit for Concurrent Detection of Soft and Timing Errors in CMOS ICs", Y. Tsiatouhas, S. Matakias, A. Arapoyanni and Th. Haniotakis, 9th  IEEE International On-Line Testing Symposium (IOLTS03), pp. 12-16, July 2003.

         

"An Embedded I_DDQ Testing Architecture and Technique", Y. Tsiatouhas,  Th. Haniotakis and A. Arapoyanni, 4th IEEE International Symposium on Quality Electronic Design (ISQED03), pp. 442-445, March 2003.

          "Electrical crosstalk estimations on flip-chip and wire-bonded OEICs", D.

          WSEAS     Int. Conf. Applied Informatics Communications (AIC03),

          Rhodes, Nov. 15-17, 2002, Greece.

          "A Hierarchical Architecture for Concurrent Soft Error Detection Based on

          Current Sensing",   Y. Tsiatouhas, A. Arapoyanni, D. Nikolos and Th.

          Haniotakis, 8th  IEEE International On-Line Testing Workshop (IOLTW02),

          pp. 56-60, July 2002.

          "A High-Performance Low-Power Static Differential Double Edge-Triggered

          Flip-Flop", Y. Moisiadis, I. Bouras, A.Arapoyanni and L. Dermentzoglou, 

          IEEE ISCAS01, Sydney, Australia.

           "A 900MHz/1800MHz Superhet Receiver Engaging High IF1 for Image

          Rejection", A.Pneumatikakis, L. Dermentzoglou, A.Arapoyanni and Y.

          Moisiadis, Proceedings of ICCDCS200, Caracas Mexico, March 2000.

          "A Versatile Built-I Self Test Scheme for Delay Fault Testing", Y. Tsiatouhas,  

         Th. Haniotakis, D. Nikolos and  A. Arapoyanni, Proceedings of Design 

           Automation and Test in Europe (DATE´00), March 2000.