Dimitris Gizopoulos

Professor, University of Athens, Department of Informatics & Telecommunications

IEEE Fellow
(Class of 2013)
ACM Distinguished Member
(Class of 2022)

Contact information:

 

Mailing address:

University of Athens, Department of Informatics and Telecommunications 

Panepistimiopolis, Ilissia, GR 157 84, Athens, Greece (Office A36, 1st floor)    

 

Phone: +30 210 727 5145

Fax: +30 210 727 5214

Email: d g i z o p [at] d i [dot] u o a [dot] g r

 

 

I am Professor at the Department of Informatics & Telecommunications (link) of the National & Kapodistrian University of Athens (link) in Greece where I lead the Computer Architecture Laboratory (link).

My group’s research focuses on the areas of Computer Architecture and Computer Systems, and in particular fault/error tolerance, design correctness validation and their relation to performance and energy-efficiency for microprocessors, microprocessor-based systems, as well as systems based on accelerators such as GPUs or AIAs (AI Accelerators).

For all details, check the Computer Architecture Lab web page (link). 

 

Member of HiPEAC [European Network of Excellence on High Performance and Embedded Architecture and Compilation] (link).

 

Member of Eurolab4HPC [Foundations of a European Research Center of Excellence in High Performance Computing Systems] (link)

 

Lab’s research funded/supported by:

Horizon Europe - Institute of Entrepreneurship Development    News detail · Chips Ju

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Editorial Service

Member of Editorial Boards:

ACM Computing Surveys, 2020 – present (link).

IEEE Transactions on Computers, 2018 – present (link).

IEEE Transactions on Emerging Topics in Computing, 2019 – present (link).

IEEE Transactions on Sustainable Computing, 2017 – present (link).

Springer Journal of Electronic Testing: Theory and Applications, 2006 – present (link).

Elsevier Journal of Parallel and Distributed Systems, 2025 – present (link).

IEEE Transactions on VLSI Systems, 2009 – 2015 (link).

IEEE Transactions on Computers, 2007 – 2013 (link).

IEEE Design & Test of Computers, 2002 – 2015 (link).


Funded Research Projects

DARE [Digital Autonomy with RISC-V Europe], EuroHPC JU (March 1, 2025 – February 29, 2028). (link).

Neuropuls [Neuromorphic energy-efficient secure accelerators based on phase change material augmented silicon photonics], Horizon Europe (January 1, 2023 – December 31, 2027) (link).  

Vitamin-V [Virtual Environment and Toolboxing for Trustworthy Development of RISC-V based Cloud Services], Horizon Europe (January 1, 2023 – December 31, 2025) (link).  

REBECCA [Reconfigurable Heterogeneous Highly Parallel Processing Platform for Safe and Secure AI], Horizon Europe (Februar 1, 2023 – January 31, 2027) (link).

UniServer [Universal Micro-Server Ecosystem by Exceeding the Energy and Performance Scaling Boundaries], H2020 (February 1, 2016 – July 31, 2019). (link)  completed

CLERECO [Cross-Layer Early Reliability Evaluation for the Computing cOntinuum], FP7 STREP (October 1, 2013 – November 30, 2016). (link)completed

HOLISTIC [Hardware and Software Techniques for Multicore Processor Architectures Reliability Enhancement], “Thales” research program, Ministry of Education – completed

DIaSTEMA [Data-Intensive Space Applications on Emerging Massively Parallel Processor Architectures: Performance, Energy, and Dependability Opportunities], “Greek-China Research Collaboration 2012-2015”, Ministry of Education – completed

AMD/UoA – unrestricted research grant on “Hardware Faults in Performance Structures of Microprocessors: Implications Analysis and Hybrid Online Detection and Diagnosis Methods”.

Cisco/UoA – unrestricted research grant on “Accelerated Online Detection of Functional and Performance Errors in Complex Multiprocessor Chips”.

ABB/UoA – Smart Diagnosis for Reliable and Safety Critical Microprocessor-Based systems

IBM Research (IBM Faculty Award 2016) –Validation of Cloud Computing Enabling Features: the Address Translation Mechanisms of a High-Performance Microprocessor

Networks of Excellence

MEDIAN [manufacturable and dependable multicore architectures at nanoscale], ESF COST Action, member, Vice-Chair (link) – completed

HiPEAC [European Network of Excellence on High Performance and Embedded Architecture and Compilation], FP7, member (link)

 


Publications/Citations

Full lists: DBLP Bibliography (link)         Google Scholar (link)           

Check Lab’s web site for all recent updates.

 


Research Support from Industry

Meta – unrestricted research grant.

AMD – unrestricted research grants.

OCP (Open Compute Project) – unrestricted research grant.

Cisco – unrestricted research grant.

IBM research – faculty award and shared university research award.

Bosch – research funding

Nvidia – equipment donation (graphics cards).

Intel – MARC (Many-core Applications Research Community) – Test Scheduling in Massively Parallel Architectures: Intel’s SCC – single chip cloud computer.

AMD – equipment donation (workstations).

Sun/Oracle – equipment donation (workstation).


Teaching

University of Athens

Computer Architecture I (undergraduate) (link to eclass)

Computer Architecture II (undergraduate) (link to eclass)

Advanced Computer Architecture (graduate) (link to eclass)


Society and Networks Membership

IEEE Fellow (Fellow: 2013, Senior member: 2003; Member: 1997; Student member: 1993).

IEEE Computer Society Golden Core Member (since 2002).

ACM Distinguished Member (2022).

HiPEAC Member.


Last update: May 2025.