Evangelos Logaras
Evangelos Logaras received his B.Sc. in Electronic Engineering from the Electronics Department at the Technological Educational Institution of Athens (TEI),
Greece in 2004. In 2007 and 2015 he respectively received his M.Sc. and Ph.D. degree in the area of "Microelectronics / Hardware Design" from the Informatics and
Telecommunications Department at the National and Kapodistrian University of Athens, Greece. For his Ph.D. thesis he was involved in the development of a High
Level hardware description tool, called SysPy (System Python).

His research and working experience include high level synthesis for digital ASIC/FPGA design, embedded systems and sensor networks design. From 2012 till 2018 he
worked in Austria as a digital design engineer for NXP Semiconductors and Infineon Technologies respectively, while currently he works as a Senior digital ASIC designer
at u-blox in Athens, Greece.


My academic path

• 2008 - 2015, Ph.D. degree in Microelectronics / Hardware Design
  University of Athens, Informatics and Telecommunications Department
  Advisor: Associate Professor E. Manolakos (University of Athens)

• 2004 - 2007, MSc in Microelectronics - Integrated Circuit Design
  University of Athens, Informatics and Telecommunications Department
  Thesis: Design of an SOM IP core with systolic architecture and implementation on an FPGA device
  Advisor: Associate Professor E. Manolakos (University of Athens)

• 1999 - 2004, BSc in Electronic Engineering
  Technological Educational Institution of Athens, Electronics Department
  Thesis: Applications with Java Cards
  Advisor: Professor P. Hatzidiakos (Technological Educational Institution of Athens)

Academic teaching/Invited talks/seminars

1. Adjunct Professor, Multiprocessing Systems in Integrated Circuits (M.Sc. course), National & Kapodistrian University of Athens,
   Informatics and Telecommunications Department, Athens, Greece, 2020


2. Teaching Assistant, Embedded Systems and IoT (M.Sc. course), University of the Aegean,
   Department of Information and Communication Systems Engineering, Samos, Greece, 2019


3. Invited talk, Programming Silicon in the era of mixed signal processing, University of the Aegean,
   Department of Information and Communication Systems Engineering, Samos, Greece, 2016

Publications


Journal papers

1. E. Logaras, O. G. Hazapis, and E. S. Manolakos, "Python to accelerate embedded SoC design: a case study for systems biology",
   ACM Transactions on Embedded Computing Systems, vol. 13, no. 4, pp. 84:1 - 84:25, February, 2014 pdf
   
(This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in ACM TECS,
http://dx.doi.org/10.1145/2560032)


2. G. Tzanakos, M. Nikolaou, D. Drakoulakos, D. Karamitros, G. Kontaxakis, E. Logaras, G. Panayiotakis, S. Pavlopoulos, M. Skiadas, G. Spyrou,
   T. Thireou and D. Vamvakas, "Design considerations and construction of a small animal PET prototype", Nuclear Instruments and Methods in
   Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, VOL 569, Issue 2, DECEMBER 2006, p. 235-239

Conference papers

1. G. N. Kranitis, E. Logaras, E. Machairas, A. Paschalis, K. Plevris, M. Taipliadou, D. Theodoropoulos,. "A Hardware Implementation of CCSDS 122.1-B-1 for
   Transformed-Based Lossy Multispectral and Hyperspectral Image Compression", in Proc. 8th International Workshop on OnBoard Payload Data
   Compression (OBPDC), 2022.
   


2. G. Vrettos, E. Logaras, and E. Kalligeros,. "Towards standardization of MQTT-alert-based sensor networks: protocol structures formalization and low-end node security",
   in Proc. IEEE International Symposium on Industrial Embedded Systems (SIES), 2018.
   


3. E. Logaras and A. Weitzer. "Using Python tools to assist mixed-signal ASIC design and verification methodologies",
   in Proc. Austrochip workshop on Microelectronics, 2017, pp. 41-46. pdf
   
(This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in IEEE Xplore,
https://doi.org/10.1109/Austrochip.2017.17)


4. E. Logaras, E. Koutsouradis and E.S. Manolakos. "Python facilitates the rapid prototyping and hw/sw verification of processor centric SoCs for FPGAs",
   in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 1214-1217.


5. O. G. Hazapis, E. Logaras and E. S. Manolakos, "A soft IP core generating SoCs for the efficient stochastic simulation of large Biomolecular Networks using FPGAs",
   in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2012, pp. 77-80.


6. E. Logaras and E. S. Manolakos, "SysPy: using Python for processor-centric SoC design",
   in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2010, pp. 764-767.


7. C. Pafilis, A. Gaitanis, C. Gatis, G. Kontaxakis, E. Logaras, S. Pavlopoulos, G. Panayiotakis, G. Spyrou, G. Tzanakos, D. Vamvakas,
   "Construction and initial studies of a two block small animal PET scanner," International conference on imaging techniques in subatomic
   physics, astrophysics, medicine, biology and industry, 2010.


8. E. S. Manolakos, E. Logaras, and F. Paschos, "Wireless Sensor Network Application for Fire Hazard Detection and Monitoring", Proc. 1st International
   Conference on Sensor Networks Applications, Experimentation and Logistics (SENSAPPEAL), 2009


9. K. Samalekas, E. Logaras, E. S. Manolakos, "Embedded web server for the AVR Butterfly enabling immediate access to wireless sensor node readings,
   In Proc. 1st International Conference on Sensor Networks Applications, Experimentation and Logistics (SENSAPPEAL), 2009


10. Manolakos, I. Logaras, E., "High Throughput Systolic SOM IP Core for FPGAs", In Proc. IEEE International Conference on Acoustics, Speech,
    and Signal Processing (ICASSP), vol. 2, pp. II-61-II-64, 2007

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